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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Luis Pires <luis.pires@eldorado.org.br>
Subject: Re: [PATCH 00/33] target/mips: Fully convert MSA opcodes to decodetree
Date: Sun, 24 Oct 2021 19:26:41 +0100	[thread overview]
Message-ID: <3331bed9-5435-1ef8-197e-f67e358c2768@flygoat.com> (raw)
In-Reply-To: <20211023214803.522078-1-f4bug@amsat.org>


在 2021/10/23 22:47, Philippe Mathieu-Daudé 写道:
> Hi,
>
>
>
> This series converts 2000+ lines of switch() code to decodetree
>
> description, so this hard-to-review/modify switch is auto generated
>
> by the decodetree script. This is a big win for maintenance (and
>
> indeed the convertion revealed 2 bugs).
>
>
>
> Massive convertions are - beside being often boring - bug-prone.
>
> In this series we re-start running the MSA tests (the tests are
>
> run automagically in the 'build-user-static' job on gitlab CI).
>
>
>
> Although boring, the conversion is very clean, so I hope it will
>
> be easy enough to review. The TRANS*() macros are heavily used.
>
>
>
> When possible, constant fields are hold with tcg_constant().
>
>
>
> Note, various opcodes can be optimized using TCG host vectors.
>
> We won't address that in this series, as it makes the resulting
>
> review harder. We will post that in a following series. Here we
>
> simply dummy-convert.
>
>
>
> The resulting msa.decode file is quite pleasant to look at, and
>
> the diff-stat is encouraging: number of LoC halved.
>
>
>
> Regards,

Thanks that's really helpful!

For the whole series:

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Double checked decode tree opcode with manual.

Thanks.

- Jiaxun

>
>
>
> Phil.
>
>
>
> git: https://gitlab.com/philmd/qemu.git tree/mips-msa-decodetree
>
> Based-on: <20211023164329.328137-1-f4bug@amsat.org>
>
>
>
> Philippe Mathieu-Daudé (33):
>
>    tests/tcg: Fix some targets default cross compiler path
>
>    target/mips: Fix MSA MADDV.B opcode
>
>    target/mips: Fix MSA MSUBV.B opcode
>
>    tests/tcg/mips: Run MSA opcodes tests on user-mode emulation
>
>    target/mips: Have check_msa_access() return a boolean
>
>    target/mips: Use enum definitions from CPUMIPSMSADataFormat enum
>
>    target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v
>
>    target/mips: Convert MSA LDI opcode to decodetree
>
>    target/mips: Introduce generic TRANS_CHECK() for decodetree helpers
>
>    target/mips: Extract df_extract() helper
>
>    target/mips: Convert MSA I5 instruction format to decodetree
>
>    target/mips: Convert MSA BIT instruction format to decodetree
>
>    target/mips: Convert MSA SHF opcode to decodetree
>
>    target/mips: Convert MSA I8 instruction format to decodetree
>
>    target/mips: Convert MSA load/store instruction format to decodetree
>
>    target/mips: Convert MSA 2RF instruction format to decodetree
>
>    target/mips: Convert MSA FILL opcode to decodetree
>
>    target/mips: Convert MSA 2R instruction format to decodetree
>
>    target/mips: Convert MSA VEC instruction format to decodetree
>
>    target/mips: Convert MSA 3RF instruction format to decodetree
>
>      (DF_HALF)
>
>    target/mips: Convert MSA 3RF instruction format to decodetree
>
>      (DF_WORD)
>
>    target/mips: Convert MSA 3R instruction format to decodetree (part
>
>      1/4)
>
>    target/mips: Convert MSA 3R instruction format to decodetree (part
>
>      2/4)
>
>    target/mips: Convert MSA 3R instruction format to decodetree (part
>
>      3/4)
>
>    target/mips: Convert MSA 3R instruction format to decodetree (part
>
>      4/4)
>
>    target/mips: Convert MSA ELM instruction format to decodetree
>
>    target/mips: Convert MSA COPY_U opcode to decodetree
>
>    target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree
>
>    target/mips: Convert MSA MOVE.V opcode to decodetree
>
>    target/mips: Convert CFCMSA and CTCMSA opcodes to decodetree
>
>    target/mips: Remove generic MSA opcode
>
>    target/mips: Remove one MSA unnecessary decodetree overlap group
>
>    target/mips: Adjust style in msa_translate_init()
>
>
>
>   tests/tcg/mips/ase-msa.mak         |   30 +
>
>   target/mips/tcg/translate.h        |    9 +
>
>   target/mips/tcg/msa.decode         |  231 ++-
>
>   target/mips/tcg/msa_helper.c       |   64 +-
>
>   target/mips/tcg/msa_translate.c    | 2781 +++++++---------------------
>
>   MAINTAINERS                        |    1 +
>
>   tests/tcg/configure.sh             |   14 +-
>
>   tests/tcg/mips/Makefile.target     |    5 +
>
>   tests/tcg/mips64/Makefile.target   |    9 +
>
>   tests/tcg/mips64el/Makefile.target |   12 +
>
>   tests/tcg/mipsel/Makefile.target   |    9 +
>
>   11 files changed, 1052 insertions(+), 2113 deletions(-)
>
>   create mode 100644 tests/tcg/mips/ase-msa.mak
>
>   create mode 100644 tests/tcg/mips64/Makefile.target
>
>   create mode 100644 tests/tcg/mips64el/Makefile.target
>
>   create mode 100644 tests/tcg/mipsel/Makefile.target
>
>
>


  parent reply	other threads:[~2021-10-24 18:28 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-23 21:47 Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 01/33] tests/tcg: Fix some targets default cross compiler path Philippe Mathieu-Daudé
2021-10-23 23:24   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 02/33] target/mips: Fix MSA MADDV.B opcode Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 03/33] target/mips: Fix MSA MSUBV.B opcode Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 04/33] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation Philippe Mathieu-Daudé
2021-10-27 10:38   ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 05/33] target/mips: Have check_msa_access() return a boolean Philippe Mathieu-Daudé
2021-10-24  1:02   ` Richard Henderson
2021-10-24 12:48     ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 06/33] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum Philippe Mathieu-Daudé
2021-10-24  1:03   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 07/33] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v Philippe Mathieu-Daudé
2021-10-24  1:05   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 08/33] target/mips: Convert MSA LDI opcode to decodetree Philippe Mathieu-Daudé
2021-10-24  1:53   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 09/33] target/mips: Introduce generic TRANS_CHECK() for decodetree helpers Philippe Mathieu-Daudé
2021-10-24  1:58   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 10/33] target/mips: Extract df_extract() helper Philippe Mathieu-Daudé
2021-10-24  2:26   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 11/33] target/mips: Convert MSA I5 instruction format to decodetree Philippe Mathieu-Daudé
2021-10-24  2:10   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 12/33] target/mips: Convert MSA BIT " Philippe Mathieu-Daudé
2021-10-24  2:45   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 13/33] target/mips: Convert MSA SHF opcode " Philippe Mathieu-Daudé
2021-10-24  3:40   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 14/33] target/mips: Convert MSA I8 instruction format " Philippe Mathieu-Daudé
2021-10-24  3:45   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 15/33] target/mips: Convert MSA load/store " Philippe Mathieu-Daudé
2021-10-24  4:53   ` Richard Henderson
2021-10-24 11:18     ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 16/33] target/mips: Convert MSA 2RF " Philippe Mathieu-Daudé
2021-10-24  5:01   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 17/33] target/mips: Convert MSA FILL opcode " Philippe Mathieu-Daudé
2021-10-24  5:04   ` Richard Henderson
2021-10-24 16:44     ` Philippe Mathieu-Daudé
2021-10-24 17:26       ` Richard Henderson
2021-10-25 16:43         ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 18/33] target/mips: Convert MSA 2R instruction format " Philippe Mathieu-Daudé
2021-10-24  5:14   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 19/33] target/mips: Convert MSA VEC " Philippe Mathieu-Daudé
2021-10-24  5:17   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 20/33] target/mips: Convert MSA 3RF instruction format to decodetree (DF_HALF) Philippe Mathieu-Daudé
2021-10-24 17:37   ` Richard Henderson
2021-10-24 17:42     ` Richard Henderson
2021-10-23 21:47 ` [PATCH 21/33] target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD) Philippe Mathieu-Daudé
2021-10-24 17:42   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 22/33] target/mips: Convert MSA 3R instruction format to decodetree (part 1/4) Philippe Mathieu-Daudé
2021-10-24 17:51   ` Richard Henderson
2021-10-24 17:52   ` Richard Henderson
2021-10-24 18:57     ` Philippe Mathieu-Daudé
2021-10-24 20:27       ` Richard Henderson
2021-10-23 21:47 ` [PATCH 23/33] target/mips: Convert MSA 3R instruction format to decodetree (part 2/4) Philippe Mathieu-Daudé
2021-10-24 17:55   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 24/33] target/mips: Convert MSA 3R instruction format to decodetree (part 3/4) Philippe Mathieu-Daudé
2021-10-24 18:09   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 25/33] target/mips: Convert MSA 3R instruction format to decodetree (part 4/4) Philippe Mathieu-Daudé
2021-10-24 18:12   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 26/33] target/mips: Convert MSA ELM instruction format to decodetree Philippe Mathieu-Daudé
2021-10-24 20:52   ` Richard Henderson
2021-10-27 17:27     ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 27/33] target/mips: Convert MSA COPY_U opcode " Philippe Mathieu-Daudé
2021-10-24 21:01   ` Richard Henderson
2021-10-27 17:40     ` Philippe Mathieu-Daudé
2021-10-23 21:47 ` [PATCH 28/33] target/mips: Convert MSA COPY_S and INSERT opcodes " Philippe Mathieu-Daudé
2021-10-24 21:02   ` Richard Henderson
2021-10-23 21:47 ` [PATCH 29/33] target/mips: Convert MSA MOVE.V opcode " Philippe Mathieu-Daudé
2021-10-24 21:09   ` Richard Henderson
2021-10-23 21:48 ` [PATCH 30/33] target/mips: Convert CFCMSA and CTCMSA opcodes " Philippe Mathieu-Daudé
2021-10-24 21:15   ` Richard Henderson
2021-10-23 21:48 ` [PATCH 31/33] target/mips: Remove generic MSA opcode Philippe Mathieu-Daudé
2021-10-24 21:16   ` Richard Henderson
2021-10-23 21:48 ` [PATCH 32/33] target/mips: Remove one MSA unnecessary decodetree overlap group Philippe Mathieu-Daudé
2021-10-24 21:17   ` Richard Henderson
2021-10-23 21:48 ` [PATCH 33/33] target/mips: Adjust style in msa_translate_init() Philippe Mathieu-Daudé
2021-10-24 21:18   ` Richard Henderson
2021-10-24 18:26 ` Jiaxun Yang [this message]
2021-10-24 19:01   ` [PATCH 00/33] target/mips: Fully convert MSA opcodes to decodetree Philippe Mathieu-Daudé

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