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From: Anup Patel <anup.patel@wdc.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: qemu-riscv@nongnu.org, Anup Patel <anup@brainfault.org>,
	Anup Patel <anup.patel@wdc.com>,
	qemu-devel@nongnu.org, Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bmeng.cn@gmail.com>
Subject: [PATCH v3 16/22] hw/riscv: virt: Use AIA INTC compatible string when available
Date: Sat, 23 Oct 2021 14:16:32 +0530	[thread overview]
Message-ID: <20211023084638.1697057-17-anup.patel@wdc.com> (raw)
In-Reply-To: <20211023084638.1697057-1-anup.patel@wdc.com>

We should use the AIA INTC compatible string in the CPU INTC
DT nodes when the CPUs support AIA feature. This will allow
Linux INTC driver to use AIA local interrupt CSRs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/riscv/virt.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index b3b431c847..83f784bdee 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
         qemu_fdt_add_subnode(mc->fdt, intc_name);
         qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle",
             intc_phandles[cpu]);
-        qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
-            "riscv,cpu-intc");
+        if (riscv_feature(&s->soc[socket].harts[cpu].env,
+                          RISCV_FEATURE_AIA)) {
+            static const char * const compat[2] = {
+                "riscv,cpu-intc-aia", "riscv,cpu-intc"
+            };
+            qemu_fdt_setprop_string_array(mc->fdt, name, "compatible",
+                                      (char **)&compat, ARRAY_SIZE(compat));
+        } else {
+            qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible",
+                "riscv,cpu-intc");
+        }
         qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0);
         qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);
 
-- 
2.25.1



  parent reply	other threads:[~2021-10-23  9:03 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-23  8:46 [PATCH v3 00/22] QEMU RISC-V AIA support Anup Patel
2021-10-23  8:46 ` [PATCH v3 01/22] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode Anup Patel
2021-10-23  8:46 ` [PATCH v3 02/22] target/riscv: Implement SGEIP bit in hip and hie CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 03/22] target/riscv: Implement hgeie and hgeip CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 04/22] target/riscv: Improve delivery of guest external interrupts Anup Patel
2021-10-23  8:46 ` [PATCH v3 05/22] target/riscv: Allow setting CPU feature from machine/device emulation Anup Patel
2021-10-23  8:46 ` [PATCH v3 06/22] target/riscv: Add AIA cpu feature Anup Patel
2021-10-23  8:46 ` [PATCH v3 07/22] target/riscv: Add defines for AIA CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 08/22] target/riscv: Allow AIA device emulation to set ireg rmw callback Anup Patel
2021-10-23  8:46 ` [PATCH v3 09/22] target/riscv: Implement AIA local interrupt priorities Anup Patel
2021-10-23  8:46 ` [PATCH v3 10/22] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32 Anup Patel
2021-10-23  8:46 ` [PATCH v3 11/22] target/riscv: Implement AIA hvictl and hviprioX CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 12/22] target/riscv: Implement AIA interrupt filtering CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 13/22] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 14/22] target/riscv: Implement AIA xiselect and xireg CSRs Anup Patel
2021-10-23  8:46 ` [PATCH v3 15/22] target/riscv: Implement AIA IMSIC interface CSRs Anup Patel
2021-10-23  8:46 ` Anup Patel [this message]
2021-10-23  8:46 ` [PATCH v3 17/22] target/riscv: Allow users to force enable AIA CSRs in HART Anup Patel
2021-10-23  8:46 ` [PATCH v3 18/22] hw/intc: Add RISC-V AIA APLIC device emulation Anup Patel
2021-10-23  8:46 ` [PATCH v3 19/22] hw/riscv: virt: Add optional AIA APLIC support to virt machine Anup Patel
2021-10-23  8:46 ` [PATCH v3 20/22] hw/intc: Add RISC-V AIA IMSIC device emulation Anup Patel
2021-10-23  8:46 ` [PATCH v3 21/22] hw/riscv: virt: Add optional AIA IMSIC support to virt machine Anup Patel
2021-10-23  8:46 ` [PATCH v3 22/22] docs/system: riscv: Document AIA options for " Anup Patel
2021-10-26  5:02 ` [PATCH v3 00/22] QEMU RISC-V AIA support Anup Patel

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