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From: Alexey Baturo <baturo.alexey@gmail.com>
Cc: baturo.alexey@gmail.com, qemu-riscv@nongnu.org,
	sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de,
	richard.henderson@linaro.org, qemu-devel@nongnu.org,
	space.monkey.delivers@gmail.com,
	Alistair Francis <alistair.francis@wdc.com>,
	kupokupokupopo@gmail.com, palmer@dabbelt.com
Subject: [PATCH v16 4/8] [RISCV_PM] Add J extension state description
Date: Fri, 22 Oct 2021 21:19:06 +0300	[thread overview]
Message-ID: <20211022181910.1999197-5-space.monkey.delivers@gmail.com> (raw)
In-Reply-To: <20211022181910.1999197-1-space.monkey.delivers@gmail.com>

Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/machine.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index f64b2a96c1..7b4c739564 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -84,6 +84,14 @@ static bool vector_needed(void *opaque)
     return riscv_has_ext(env, RVV);
 }
 
+static bool pointermasking_needed(void *opaque)
+{
+    RISCVCPU *cpu = opaque;
+    CPURISCVState *env = &cpu->env;
+
+    return riscv_has_ext(env, RVJ);
+}
+
 static const VMStateDescription vmstate_vector = {
     .name = "cpu/vector",
     .version_id = 1,
@@ -100,6 +108,24 @@ static const VMStateDescription vmstate_vector = {
         }
 };
 
+static const VMStateDescription vmstate_pointermasking = {
+    .name = "cpu/pointer_masking",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .needed = pointermasking_needed,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINTTL(env.mmte, RISCVCPU),
+        VMSTATE_UINTTL(env.mpmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.mpmbase, RISCVCPU),
+        VMSTATE_UINTTL(env.spmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.spmbase, RISCVCPU),
+        VMSTATE_UINTTL(env.upmmask, RISCVCPU),
+        VMSTATE_UINTTL(env.upmbase, RISCVCPU),
+
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static const VMStateDescription vmstate_hyper = {
     .name = "cpu/hyper",
     .version_id = 1,
@@ -191,6 +217,7 @@ const VMStateDescription vmstate_riscv_cpu = {
         &vmstate_pmp,
         &vmstate_hyper,
         &vmstate_vector,
+        &vmstate_pointermasking,
         NULL
     }
 };
-- 
2.30.2



  parent reply	other threads:[~2021-10-22 18:28 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-22 18:19 [PATCH v16 0/8] RISC-V Pointer Masking implementation Alexey Baturo
2021-10-22 18:19 ` [PATCH v16 1/8] [RISCV_PM] Add J-extension into RISC-V Alexey Baturo
2021-10-22 18:19 ` [PATCH v16 2/8] [RISCV_PM] Add CSR defines for RISC-V PM extension Alexey Baturo
2021-10-22 18:19 ` [PATCH v16 3/8] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode Alexey Baturo
2021-10-25  5:53   ` Alistair Francis
2021-10-22 18:19 ` Alexey Baturo [this message]
2021-10-22 18:19 ` [PATCH v16 5/8] [RISCV_PM] Print new PM CSRs in QEMU logs Alexey Baturo
2021-10-25  1:21   ` Alistair Francis
2021-10-22 18:19 ` [PATCH v16 6/8] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions Alexey Baturo
2021-10-22 18:19 ` [PATCH v16 7/8] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension Alexey Baturo
2021-10-22 18:19 ` [PATCH v16 8/8] [RISCV_PM] Allow experimental J-ext to be turned on Alexey Baturo
2021-10-25  4:16 ` [PATCH v16 0/8] RISC-V Pointer Masking implementation Alistair Francis

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