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From: Luo Jie <luoj@codeaurora.org>
To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
	davem@davemloft.net, kuba@kernel.org
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	sricharan@codeaurora.org, Luo Jie <luoj@codeaurora.org>
Subject: [PATCH v7 09/14] net: phy: add constants for fast retrain related register
Date: Sun, 24 Oct 2021 16:27:33 +0800	[thread overview]
Message-ID: <20211024082738.849-10-luoj@codeaurora.org> (raw)
In-Reply-To: <20211024082738.849-1-luoj@codeaurora.org>

Add the constants for 2.5G fast retrain capability
in 10G AN control register, fast retrain status and
control register and THP bypass register into mdio.h.

Signed-off-by: Luo Jie <luoj@codeaurora.org>
---
 include/uapi/linux/mdio.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index bdf77dffa5a4..c54e6eae5366 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -53,12 +53,14 @@
 #define MDIO_AN_EEE_LPABLE	61	/* EEE link partner ability */
 #define MDIO_AN_EEE_ADV2	62	/* EEE advertisement 2 */
 #define MDIO_AN_EEE_LPABLE2	63	/* EEE link partner ability 2 */
+#define MDIO_AN_CTRL2		64	/* AN THP bypass request control */
 
 /* Media-dependent registers. */
 #define MDIO_PMA_10GBT_SWAPPOL	130	/* 10GBASE-T pair swap & polarity */
 #define MDIO_PMA_10GBT_TXPWR	131	/* 10GBASE-T TX power control */
 #define MDIO_PMA_10GBT_SNR	133	/* 10GBASE-T SNR margin, lane A.
 					 * Lanes B-D are numbered 134-136. */
+#define MDIO_PMA_10GBR_FSRT_CSR	147	/* 10GBASE-R fast retrain status and control */
 #define MDIO_PMA_10GBR_FECABLE	170	/* 10GBASE-R FEC ability */
 #define MDIO_PCS_10GBX_STAT1	24	/* 10GBASE-X PCS status 1 */
 #define MDIO_PCS_10GBRT_STAT1	32	/* 10GBASE-R/-T PCS status 1 */
@@ -239,6 +241,9 @@
 #define MDIO_PMA_10GBR_FECABLE_ABLE	0x0001	/* FEC ability */
 #define MDIO_PMA_10GBR_FECABLE_ERRABLE	0x0002	/* FEC error indic. ability */
 
+/* PMA 10GBASE-R Fast Retrain status and control register. */
+#define MDIO_PMA_10GBR_FSRT_ENABLE	0x0001	/* Fast retrain enable */
+
 /* PCS 10GBASE-R/-T status register 1. */
 #define MDIO_PCS_10GBRT_STAT1_BLKLK	0x0001	/* Block lock attained */
 
@@ -247,6 +252,7 @@
 #define MDIO_PCS_10GBRT_STAT2_BER	0x3f00
 
 /* AN 10GBASE-T control register. */
+#define MDIO_AN_10GBT_CTRL_ADVFSRT2_5G	0x0020	/* Advertise 2.5GBASE-T fast retrain */
 #define MDIO_AN_10GBT_CTRL_ADV2_5G	0x0080	/* Advertise 2.5GBASE-T */
 #define MDIO_AN_10GBT_CTRL_ADV5G	0x0100	/* Advertise 5GBASE-T */
 #define MDIO_AN_10GBT_CTRL_ADV10G	0x1000	/* Advertise 10GBASE-T */
@@ -289,6 +295,9 @@
 #define MDIO_EEE_2_5GT		0x0001	/* 2.5GT EEE cap */
 #define MDIO_EEE_5GT		0x0002	/* 5GT EEE cap */
 
+/* AN MultiGBASE-T AN control 2 */
+#define MDIO_AN_THP_BP2_5GT	0x0008	/* 2.5GT THP bypass request */
+
 /* 2.5G/5G Extended abilities register. */
 #define MDIO_PMA_NG_EXTABLE_2_5GBT	0x0001	/* 2.5GBASET ability */
 #define MDIO_PMA_NG_EXTABLE_5GBT	0x0002	/* 5GBASET ability */
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


  parent reply	other threads:[~2021-10-24  8:28 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-24  8:27 [PATCH v7 0/14] net: phy: Add qca8081 ethernet phy driver Luo Jie
2021-10-24  8:27 ` [PATCH v7 01/14] net: phy: at803x: replace AT803X_DEVICE_ADDR with MDIO_MMD_PCS Luo Jie
2021-10-24  8:27 ` [PATCH v7 02/14] net: phy: at803x: use phy_modify() Luo Jie
2021-10-24  8:27 ` [PATCH v7 03/14] net: phy: at803x: improve the WOL feature Luo Jie
2021-10-24 18:29   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 04/14] net: phy: at803x: use GENMASK() for speed status Luo Jie
2021-10-24  8:27 ` [PATCH v7 05/14] net: phy: add qca8081 ethernet phy driver Luo Jie
2021-10-24 18:29   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 06/14] net: phy: add qca8081 read_status Luo Jie
2021-10-24 18:30   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 07/14] net: phy: add qca8081 get_features Luo Jie
2021-10-24 18:31   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 08/14] net: phy: add qca8081 config_aneg Luo Jie
2021-10-24 18:31   ` Andrew Lunn
2021-10-24  8:27 ` Luo Jie [this message]
2021-10-24 18:32   ` [PATCH v7 09/14] net: phy: add constants for fast retrain related register Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 10/14] net: phy: add genphy_c45_fast_retrain Luo Jie
2021-10-24 18:33   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 11/14] net: phy: add qca8081 config_init Luo Jie
2021-10-24 18:34   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 12/14] net: phy: add qca8081 soft_reset and enable master/slave seed Luo Jie
2021-10-24 18:40   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 13/14] net: phy: adjust qca8081 master/slave seed value if link down Luo Jie
2021-10-24 18:41   ` Andrew Lunn
2021-10-24  8:27 ` [PATCH v7 14/14] net: phy: add qca8081 cdt feature Luo Jie
2021-10-24 18:43   ` Andrew Lunn
2021-10-25 13:10 ` [PATCH v7 0/14] net: phy: Add qca8081 ethernet phy driver patchwork-bot+netdevbpf

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